Role of Consciousness in Episodic Memory Processes
Document Type:ASSC Conference Item
Deposited by:Prof Stan Franklin on 20 May 2009
Date of Issue:2005
Event Location:Pasadena , CA.
Event Title:Ninth Conference of the Association for the Scientific Study of Consciousness
Event Type:ASSC Conference
Abstract:We present a computational model to illustrate the role of consciousness in memory processes, particularly in episodic memories. This is accomplished in the context of the IDA technology [Franklin 2005]. The IDA architecture implements Baars’ Global Workspace Theory of Consciousness , and the IDA technology is used both for cognitive modeling and for building autonomous agents [Franklin and Graesser 1997]. Every autonomous agent within a complex, dynamic environment must frequently and cyclically sense its environment and act on it, iteratively, in a Cognitive Cycle. IDA’s Cognitive Cycle consists of nine steps: (1) Perception, (2) Percept into preconscious working memory buffers, (3) Generation of local associations from episodic memories, (4) Competition for Consiousness, (5) Conscious Broadcast, (6) Recruitment of internal resources, (7) Setting goal context hierarchy, (8) Action chosen, and (9) Action taken. It is hypothesized that cognitive cycles occur five to ten times a second in humans, cascading so that some of the steps in adjacent cycles occur in parallel [Baars & Franklin 2003]. Seriality is preserved in the conscious broadcasts. We will explore interpreting the contents of ‘consciousness’ so as to be able to encode the what, where and when of each cognitive cycle into transient episodic memory. We will present computational mechanisms for two forms of episodic memory, transient episodic memory and long-term declarative memory, and a consolidation mechanism between them. A modified version of Sparse Distributed Memory [Kanerva 1988; Ramamurthy, D'Mello, and Franklin 2004] is employed for the transient episodic memory. We have implemented three different decay functions for the modified Sparse Distributed Memory architecture. We will also explore decay mechanisms in declarative memory.